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LSI Logic Announces Availability of Highly Configurable Multi-Ported DDR Memory Controller

MILPITAS, Calif., Oct. 9 /PRNewswire-FirstCall/ -- Broadening its support of application specific integrated circuit (ASIC) design for double data rate (DDR) SDRAM applications, LSI Logic Corporation (NYSE: LSI) today announced the availability of a multi-ported DDR memory controller. When coupled with the LSI Logic DDR PHY core, announced yesterday, this new offering provides LSI Logic customers a complete DDR memory system interface solution for system-on-a-chip (SoC) ASIC and RapidChip(TM) (rapidchip.lsilogic.com) designs.

The LSI Logic DDR controller supports up to eight 32/64-bit configurable ports based on a flexible architecture which enables easy support for new line-buffers to address a range of bus configurations, arbitration schemes and 128/256/512 megabit DDR memory devices. In its default configuration, the memory controller provides on-chip interface support for a multiple Advanced Microcontroller Bus Architecture (AMBA(TM)) AHB line buffers with configurable width and depths for a complete multi-ported AMBA based memory subsystem. The configurable architecture also allows customization to specific customer needs based on system and memory-specific requirements such as latency and bandwidth.

"In designing the new Multi-ported DDR memory controller we focused on maximizing multi-master subsystems performance while providing a highly configurable core to enable customers with both off the shelf standard configuration and the ability to tailor the DDR controller front-end interface for customer differentiation," said Rafi Kedem, senior director of the Processor Cores Technology Group at LSI Logic. "Also due to the modular nature of the memory controller architecture, the design can be easily adapted to support emerging memories such as DDR2 without impact to the customer's on-chip system interfaces."

The multi-port DDR memory controller is fully supported by LSI Logic's CoreWare® program, enabling it to be easily integrated with an extensive library of pre-designed and pre-verified cores, along with customer designed logic. The CoreWare library includes, among others, the ARM1026EJ-S(TM), ARM926EJ-S(TM), ARM946E-S(TM), ARM966E-S(TM), ARM7EJ-S(TM), and ARM7TDMI-S(TM) processor cores from ARM Limited, the MIPS64(TM) 5Kf(TM) and MIPS32(TM) 4KEc(TM) processor cores from MIPS Technologies, Inc., and ZSP(TM) digital signal processor cores. The company also offers a broad range of processor peripherals, a complete family of processor subsystem reference designs, and processor based platforms for customers' SoC design needs. In addition, LSI Logic provides "rapid prototyping" support as well as worldwide processor integration support.

More information on the LSI Logic DDR Memory Controller and DDR SDRAM PHY core can be found at http://www.lsilogic.com/products/coreware/ddr/index.html

About LSI Logic Corporation

LSI Logic Corporation is a leading designer and manufacturer of communications, consumer and storage semiconductors for applications that access, interconnect and store data, voice and video. In addition, the company supplies storage network solutions for the enterprise. LSI Logic is headquartered at 1621 Barber Lane, Milpitas, CA 95035, http://www.lsilogic.com .

    Editor's Notes:

    1.  All LSI Logic news releases (financial, acquisitions, manufacturing,
        products, technology etc.) are issued exclusively by PR Newswire and
        are immediately thereafter posted on the company's external website,
        http://www.lsilogic.com .
    2.  LSI Logic, the LSI Logic logo design, CoreWare and G12 are registered
        trademarks or trademarks of LSI Logic Corporation.
    3.  ARM, AMBA, ARM1026EJ-S, ARM926EJ-S, ARM946E-S, ARM966E-S, ARM7EJ-S,
        and ARM7TDMI-S are registered trademarks or trademarks of ARM Limited.
    4.  All other brand or product names may be trademarks or registered
        trademarks of their respective companies.



Source: LSI Logic Corporation

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